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CPU Micro-Architecture and RTL Design Engineer (RISC V)

Job position: CPU Micro-Architecture and RTL Design Engineer (RISC V), Santa Clara, CA, USA

and/or VHDL. Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing..

Job Location: Santa Clara, CA, USA

Salary: unspecified

Company: Qualcomm

Job posted: 19 Feb 2026

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CPU Micro-Architecture And RTL Design Engineer (RISC V) in Santa Clara, CA: Job P5

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