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ASIC Engineer, Design Verification


Job position: ASIC Engineer, Design Verification, Austin, TX - Sunnyvale, CA, USA

of hands-on experience in SystemVerilog/UVM methodology and/or C/C++ based verification 15+ years experience in IP/sub-system.....

Job Location: Austin, TX - Sunnyvale, CA, USA

Salary: unspecified

Company: Meta

Job posted: 28 Dec 2024

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