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VHDL jobs in schenectady USA

9 vhdl jobs found in schenectady: showing 1 - 9

Fpga Designer
Company: GE HealthCare |

Location: Niskayuna, NY, USA

| Salary: US$120000 - 180000 per year | Date posted: 17 Jun 2026
FPGAs and custom ASICs using VHDL/Verilog, perform timing analysis and timing closure using tools such as QuestaSim, Quartus... tools (Quartus, QuestaSim) and STA workflows. Experience with Verilog, VHDL for understanding hardwarefirmware interaction
Research Engineer
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 13 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Lead Engineer - Design
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 13 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Lead Research Engineer - Fpga Design
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 13 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Lead Research Engineer
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 13 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Fpga Design - Lead Research Engineer "clearance Required"
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 13 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Fpga Design - Lead Research Engineer
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 13 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Fpga Design - Lead Research Engineer "clearance Required"
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$98400 - 164000 per year | Date posted: 09 Jun 2026
of strong FPGA and SoC design experience using Verilog, SystemVerilog and VHDL 2-5 years of hands-on experience with Xilinx
Senior Engineer - Embedded Computing - "clearance Required"
Company: GE Vernova |

Location: Niskayuna, NY, USA

| Salary: US$131700 - 219300 per year | Date posted: 27 May 2026
and development experience with Verilog and VHDL. 3- 7 years of knowledge of Xilinx and/or Altera devices, tools, and ecosystem (e.g