VHDL jobs in san jose USA
29 vhdl jobs found in san jose: showing 1 - 29
Fpga Architecture Engineer
Company: Lattice Semiconductor |
skills for architectural research and analysis, including Python; familiarity with Verilog or VHDL. Initiative, clearLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 04 Oct 2026
Product Applications Engineer-silicon Debug & Embedded Systems
Company: Advanced Micro Devices |
, oscilloscopes and logic analyzers. Solid RTL fundamentals in SystemVerilog, Verilog, and/or VHDL. AMD/Xilinx FPGA experienceLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 03 Oct 2026
Lead Software Engineer: Ai For Hardware Verification
Company: Cadence Design Systems |
, or hardware-assisted debug workflows. Knowledge or experience with EDA and VLSI design, including Verilog, SystemVerilog, or VHDLLocation: San Jose, CA, USA
| Salary: US$119000 - 221000 per year | Date posted: 29 Sep 2026
Field Application Engineer – Graduate Rotational Program
Company: Advanced Micro Devices |
language (VHDL/Verilog) Familiarity with FPGA development tools (e.g., Vivado, Quartus) Knowledge of embedded systemsLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 24 Sep 2026
Customer Engagement Architect
Company: Cadence Design Systems |
environments. Expertise in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customerLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 24 Sep 2026
Customer Engagement Engineer Ii
Company: Cadence Design Systems |
environments.Proficiency in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customerLocation: San Jose, CA, USA
| Salary: US$105000 - 195000 per year | Date posted: 24 Sep 2026
Lead Customer Engagement Engineer
Company: Cadence Design Systems |
in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quicklyLocation: San Jose, CA, USA
| Salary: US$119000 - 221000 per year | Date posted: 24 Sep 2026
Lead Customer Engagement Engineer
Company: Cadence Design Systems |
in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quicklyLocation: San Jose, CA, USA
| Salary: US$119000 - 221000 per year | Date posted: 23 Sep 2026
Principal Hw/fpga Engineer
Company: Raytheon Technologies |
Qualifications We Prefer: Strong comprehension of HDL programming languages such as VHDL, Verilog or SystemVerilog. StrongLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 22 Sep 2026
Lead Software Engineer - Low-power Verification
Company: Cadence Design Systems |
experience. Working knowledge of IEEE 1801 UPF and RTL languages (Verilog, SystemVerilog, VHDL). Ability to read, reviewLocation: San Jose, CA, USA
| Salary: US$114800 - 213200 per year | Date posted: 16 Sep 2026
Lead Software Engineer - Low Power Verification
Company: Cadence Design Systems |
experience. Working knowledge of IEEE 1801 UPF and RTL languages (Verilog, SystemVerilog, VHDL). Strong debugging skills rootLocation: San Jose, CA, USA
| Salary: US$114800 - 213200 per year | Date posted: 14 Sep 2026
Eda Software Engineer
Company: Altera |
using Verilog, SystemVerilog, and/or VHDL. Experience developing and maintaining internal applications and APIs. WaysLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 10 Sep 2026
Senior Chip Lead Engineer-soc/asic
Company: Advanced Micro Devices |
and methodologies. Proficiency with Verilog, VHDL, and/or SystemVerilog. Working knowledge of industry-standard EDA toolsLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 03 Sep 2026
Transceivers & Protocol Ip Application Engineer
Company: Altera |
description language, such as Verilog, SystemVerilog, or VHDL. Scripting or software-development experience in Python, Tcl, Bash, C, or CLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 27 Aug 2026
Summer 2027 Masters Field Applications Engineer Intern
Company: Advanced Micro Devices |
. Engineers interested in technical sales who help customers get their designs done faster. Exposure to Digital Design (VHDLLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 21 Aug 2026
Field Applications Engineer (fae)
Company: Altera |
proficiency in RTL (Verilog/VHDL), timing analysis, synthesis, and FPGA implementation flows. Experience with highspeedLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 21 Aug 2026
2027 Masters Hardware Engineering Intern/co-op
Company: Advanced Micro Devices |
, we strongly encourage you to apply C/C++, Verilog, VHDL, Python, Perl, Spice, Ruby, Chrome OS, MATLAB. ASIC designLocation: San Jose, CA - Santa Clara, CA, USA
| Salary: unspecified | Date posted: 21 Aug 2026
2027 Masters Firmware Engineering Co-op/intern
Company: Advanced Micro Devices |
, debuggers, compilers and system wide debugging from software to firmware to hardware Opensource concepts VHDL/Verilog/FPGALocation: San Jose, CA - Santa Clara, CA, USA
| Salary: unspecified | Date posted: 21 Aug 2026
2027 Undergrad Firmware Engineering Co-op/intern
Company: Advanced Micro Devices |
, debuggers, compilers and system wide debugging from software to firmware to hardware Opensource concepts VHDL/Verilog/FPGALocation: San Jose, CA - Santa Clara, CA, USA
| Salary: unspecified | Date posted: 21 Aug 2026
2027 Undergrad Hardware Engineering Intern/co-op
Company: Advanced Micro Devices |
, we strongly encourage you to apply C/C++, Verilog, VHDL, Python, Perl, Spice, Ruby, Chrome OS, MATLAB. ASIC designLocation: San Jose, CA - Santa Clara, CA, USA
| Salary: unspecified | Date posted: 20 Aug 2026
Semiconductor Design Engineer
Company: Micron |
's degree in Electrical Engineering or related field. Position requires: 1\. System Verilog/Verilog/VHDL, 2\. C/CLocation: San Jose, CA, USA
| Salary: US$142678.02 - 170000 per year | Date posted: 20 Aug 2026
Staff Silicon Validation Engineer
Company: Lattice Semiconductor |
evaluation/debug. Expertise in Verilog/VHDL and design implementation using FPGA development tools. Expertise in testLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 17 Aug 2026
Silicon Validation Engineer
Company: Lattice Semiconductor |
and DisplayPort/HDMI etc. Expertise in high speed board design and signal integrity evaluation/debug. Expertise in Verilog/VHDLLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 17 Aug 2026
Fpga System Design Engineer
Company: Altera |
++. 1+ year of FPGA development experience using Verilog or VHDL. Strong understanding of digital logic design and FPGA.... Hands-on experience with: MATLAB and Simulink C/C++ and CUDA Verilog and/or VHDL FPGA design Quartus PrimeLocation: San Jose, CA, USA
| Salary: US$118900 - 172200 per year | Date posted: 14 Aug 2026
Software Validation Engineer
Company: Altera |
with version control systems (e.g., Git, Perforce). Knowledge of hardware description languages (Verilog/VHDL) and FPGA designLocation: San Jose, CA, USA
| Salary: US$133200 - 192800 per year | Date posted: 08 Aug 2026
Senior Product Planning Engineer - Simulation, Security, And Deployment
Company: Advanced Micro Devices |
simulation (VHDL, Verilog, and SystemVerilog), Vivado Simulator capabilities, RTL encryption/IP protection, and deploymentLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 06 Aug 2026
Staff System Architecture And Design Engineer
Company: Analog Devices |
-level power delivery, battery backup integration are preferred. Experience with FPGA-based control system development (VHDLLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 23 Jul 2026
Fpga Engineer: Physical Ai & Robotics
Company: Advanced Micro Devices |
EXPERIENCE Experience developing FPGA designs using Verilog, SystemVerilog, or VHDL. Experience with AMD Vivado, Vitis, VitisLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 18 Jul 2026
Hardware Design Engineer Technical Lead
Company: Cisco Systems |
/VHDL design Experience on the scripts (Python, Tcl, etc.) Experience with lab bring up and design validation