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VHDL jobs in arvada USA

8 vhdl jobs found in arvada: showing 1 - 8

Fpga Engineer Ii
Company: CesiumAstro |

Location: Westminster, CO, USA

| Salary: US$113000 - 136000 per year | Date posted: 25 Sep 2026
. Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx's Vivado, Modelsim, etc.). Hands-on experience
Senior Staff Fpga Engineer
Company: CesiumAstro |

Location: Westminster, CO, USA

| Salary: US$184000 - 225000 per year | Date posted: 25 Sep 2026
HDL level. Proficiency in VHDL and/or Verilog design capture. Familiarity with radiation-tolerant FPGA devices (Xilinx
Senior Fpga Engineer
Company: CesiumAstro |

Location: Westminster, CO, USA

| Salary: US$133000 - 161000 per year | Date posted: 24 Sep 2026
level. Expertise in FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx's Vivado, Modelsim, etc.). Hands
Fpga Verification Engineer Ii
Company: CesiumAstro |

Location: Westminster, CO, USA

| Salary: US$113000 - 136000 per year | Date posted: 24 Sep 2026
including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP
Summer 2027 - Electrical Engineering Internship, Fpga
Company: CesiumAstro |

Location: Westminster, CO, USA

| Salary: unspecified | Date posted: 15 Sep 2026
with FPGA design and verification (Verilog/VHDL, HDL coder, Xilinx's Vivado, Modelsim, etc.). Hands-on experience with lab
Eng Sr Prin - Elec
Company: BAE Systems |

Location: Westminster, CO, USA

| Salary: unspecified | Date posted: 11 Sep 2026
background. Experience with VHDL/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis
Eng Sr - Sw
Company: BAE Systems |

Location: Westminster, CO, USA

| Salary: unspecified | Date posted: 31 Jul 2026
, and troubleshoot common issues. Experience with databases, both relational and NoSQL. Basic understanding of FPGA design and VHDL
Eng Sr Prin - Elec
Company: BAE Systems |

Location: Westminster, CO, USA

| Salary: unspecified | Date posted: 10 Jul 2026
background. Experience with VHDL/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis