Layout jobs in san jose USA
167 layout jobs found in san jose: showing 1 - 50
Engineering Estimator - Electric
Company: PG&E |
sketch or layout and cost estimate of more complex jobs from field notes prepared by an employee in a higher classificationLocation: San Jose, CA, USA
| Salary: US$48.58 per hour | Date posted: 09 Jul 2026
Senior Or Principal Analog Design Engineer
Company: Celero Communications, Inc. |
, and post layout extraction tools) is a must Experience in advance CMOS design and verification flows (tools to evaluate selfLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 09 Jul 2026
Senior Or Principal Pll Design Engineer
Company: Celero Communications, Inc. |
) linearization and device-level noise optimization Supervise and verify layouts produced by layout engineers to ensure floorplanningLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 09 Jul 2026
Principal Physical Design Engineer
Company: Celero Communications, Inc. |
Design Rule Checking (DRC) and Layout Versus Schematic (LVS) violations. Methodology Development: Drive automationLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 09 Jul 2026
Senior Infrastructure & Hardware Engineer
Company: Zoom |
and validate data center readiness including rack layout. This includes: power and cooling capacity, hot/cold aisle design, spaceLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 09 Jul 2026
Principal High-speed Analog Layout Design Engineer
Company: Celero Communications, Inc. |
Principal High-Speed Analog Layout Design Engineer Locations: Irvine, CA | San Jose, CA | Ottawa, Canada About the..., we are looking for a driven and resourceful High-Speed Analog Layout Engineer to be the backbone of our daily operations and a key partnerLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 09 Jul 2026
Senior Or Principal Serdes Design Engineer
Company: Celero Communications, Inc. |
Oversee physical layout to minimize parasitics, device stress, electromigration and process variation impacts Overview of theLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 09 Jul 2026
Senior Staff Engineer, Electrical Design
Company: Celestica |
stack-up, power planes, and tools used to simulate voltage gradients Familiarity with schematic capture and CAD layoutLocation: San Jose, CA, USA
| Salary: US$150000 - 210000 per year | Date posted: 09 Jul 2026
Senior Layout Designer
Company: Micron |
Req ID: JR97379 Senior Layout Designer Our vision is to transform how the world uses information to enrich life... of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior LayoutLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 08 Jul 2026
Hardware Engineering Technical Leader
Company: Cisco Systems |
. Previous experience with complex high-speed board design and board bring-up. Prior experience with schematics/layoutLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 08 Jul 2026
Hardware Engineer Ii (co-op) - United States
Company: Cisco Systems |
and Verification System/Board Design Circuit Board Layout Hardware Automation Validation and Test Signal Integrity PowerLocation: San Jose, CA, USA
| Salary: US$44000 - 185000 per year | Date posted: 08 Jul 2026
Hardware Design Engineer Technical Lead
Company: Cisco Systems |
. Previous experience with complex high-speed board design and board bring-up. Prior experience with schematics/layoutLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 08 Jul 2026
Peoplesoft Developer
Company: Bright Vision Technologies |
systems. Build SQR and BI Publisher reports, including performance tuning and complex layout design. Implement and maintainLocation: Evergreen, QLD - San Jose, CA, USA
| Salary: unspecified | Date posted: 08 Jul 2026
Manufacturing Engineering Manager
Company: Jabil |
, production methods, equipment layout, personnel, and material flow. Provide exceptional support to customers, team membersLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 08 Jul 2026
Field Application Engineer (seg, San Jose)
Company: Teradyne |
done in collaborative environment Load board / probe card schematics design and layout review for a test solution Analyze problemsLocation: San Jose, CA, USA
| Salary: US$170500 per year | Date posted: 08 Jul 2026
Engineering Manager (bilingual Mandarin)
Company: Foxconn Industrial Internet |
, and layout optimization for future scalability. Manage engineering projects, including capital equipment justificationLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 07 Jul 2026
Technologist, Rfic Design Engineer
Company: Western Digital |
, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and yield... etc.) Experience with RF and high performance analog block layout such as LNA, mixer, analog to digital converters, references, digitalLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 07 Jul 2026
Component Engineering Technical Leader (hybrid)
Company: Cisco Systems |
electronics, board design, circuit analysis, PCB layout, hardware debugging, basic digital logic and communication interfacesLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 07 Jul 2026
Staff Rfic Design Engineer
Company: Western Digital |
, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product... with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization Experience with floorLocation: San Jose, CA, USA
| Salary: US$119900 - 159800 per year | Date posted: 07 Jul 2026
Hardware Engineer
Company: Cisco Systems |
, review schematics/layout review, bring-up, troubleshooting, design validation, and build yield bring-up with tier one ODM/JDM... with schematics/layout, Hardware bring-up, troubleshooting, system level testing. Previous experience with working with SoftwareLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 07 Jul 2026
Technologist, Rfic Design Engineer
Company: Western Digital |
, optimization, layout supervision, layout verification, preparation of test plan for the testing team, reliability and yield... etc.) Experience with RF and high performance analog block layout such as LNA, mixer, analog to digital converters, references, digitalLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 07 Jul 2026
Staff Rfic Design Engineer
Company: Western Digital |
, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product... with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization Experience with floorLocation: San Jose, CA, USA
| Salary: US$119900 - 159800 per year | Date posted: 07 Jul 2026
Sr Principal/ Principal Rf Engineer
Company: Skyworks |
-silicon verification suites. Work with layout designers to guide and optimize their implementation of your blocks. Plan... Cadence Spectre/SpectreRF, MATLAB, 3-D simulators (EMX), AMS Experience with analog layout methodologies, parasiticLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 06 Jul 2026
Project Superintendent I
Company: Holland Residential |
municipal ordinances. Ensure proper and accurate job layout according to design drawings and specifications. ActivelyLocation: San Jose, CA, USA
| Salary: US$140000 - 170000 per year | Date posted: 02 Jul 2026
Asic Engineering Technical Leader
Company: Cisco Systems |
innovation across the large CISCO portfolio, including but not limited to System/Board Design, Circuit Board Layout, HardwareLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 02 Jul 2026
Principal Design Engineer
Company: Qorvo |
, simulation, and layout of the GaAs PA IC as well as the accompanying laminate/IPD based matching networks using ADS and various... with various PA linearization techniques. Knowledge of Cadence and AWR Microwave Office schematic capture, layout and simulationLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 02 Jul 2026
Senior High Speed Mixed-signal I/o & Analog Layout Engineer
Company: Artech Information Systems |
Job Title: Senior High Speed Mixed-Signal I/O & Analog Layout Engineer Location: San Jose, CA (100% Onsite) Duration...: 6+ Months Pay Rate Range: $70.00-$80.00/hr on W2 Job Description: As a senior high speed mixed-signal layout/analogLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 01 Jul 2026
Principal Design Engineer
Company: Micron |
design, layout, and optimization of datapath circuits for NAND flash memory! This position will drive task forces and make... to lead technical datapath design projects, advising the design planning, layout, and validation activities accordingLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 01 Jul 2026
Senior High Speed Mixed-signal I/o & Analog Layout Engineer
Company: Protingent |
Job Title: Senior High Speed Mixed-Signal I/O & Analog Layout Engineer Position Description: Protingent Staffing... has an exciting contract Senior High Speed Mixed-Signal I/O & Analog Layout Engineer with our client located in San JoseLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 01 Jul 2026
Installation Project Manager
Company: Jacuzzi Group |
align with established expectations. Conduct field visits to verify workmanship, jobsite conditions, layout accuracyLocation: San Jose, CA, USA
| Salary: US$80000 per year | Date posted: 01 Jul 2026
Contingent Workforce Specialist
Company: Varite |
creation, through video/audio editing, mobile app development, print layout and animation software. WHAT WE DO? EstablishedLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 01 Jul 2026
Field Service Project Manager
Company: Bloom Energy |
to verify site layout matches designs and meets serviceability requirements Coordinate with Operations to verify shipmentsLocation: San Jose, CA, USA
| Salary: US$121400 - 174600 per year | Date posted: 01 Jul 2026
Administrative Assistant 3
Company: Varite |
video/audio editing, mobile app development, print layout and animation software. WHAT WE DO? Established in the YearLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 01 Jul 2026
Staff Engineer, Test
Company: Renesas Electronics |
PCB layout design, utilizing advanced techniques for parasitic reduction, signal integrity, and high-current powerLocation: San Jose, CA, USA
| Salary: US$140000 - 175000 per year | Date posted: 30 Jun 2026
Sr System Engineer
Company: Renesas Electronics |
electronic systems - from concept and architecture through hardware design, PCB layout, and firmware implementation. KEY... (Altium). Execute PCB layout, routing, and design rule review for multi-layer boards, ensuring signal integrity, EMCLocation: San Jose, CA, USA
| Salary: US$109500 - 171150 per year | Date posted: 30 Jun 2026
Analog/mixed-signal Ic Design Engineer - Acacia (hybrid)
Company: Cisco Systems |
. You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS products. You will lead efforts for a large... communications. Experience in FinFET and GAA technologies. High-frequency layout experience including floorplaning (power/groundLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 30 Jun 2026
Senior Package Design Engineer
Company: Rambus |
, you will be responsible for supporting the design and layout of new products from early concept to tape out, focusing primarily...: Drive early chip-package co-design and development of bump and ball map. Own layout of package types such as FCCSP, FCBGALocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 30 Jun 2026
Ic Cad Engineer
Company: Advanced Micro Devices |
Cadence Virtuoso schematic and layout features Develop and maintain the LEF generation flow Develop and maintain the Calibre... experience through AI agent integration PREFERRED EXPERIENCE: Experience with Virtuoso schematic/layout or any equivalentLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 30 Jun 2026
Senior Package Design Engineer
Company: Rambus |
, you will be responsible for supporting the design and layout of new products from early concept to tape out, focusing primarily... Drive early chip-package co-design and development of bump and ball map. Own layout of package types such as FCCSP, FCBGALocation: San Jose, CA - Taipei City, USA
| Salary: unspecified | Date posted: 30 Jun 2026
Frontend Software Engineer Project Intern (global Crm) - 2026 Start（bs/ms）
Company: TikTok |
field. - Proficient in HTML, CSS and JavaScript; familiar with page architecture and layout, as well as common HTML5/CSS3Location: San Jose, CA, USA
| Salary: unspecified | Date posted: 30 Jun 2026
Principal Design Engineer
Company: Micron |
, you will lead the development, layout, and optimization of ground breaking datapath circuits for next-generation NAND flash memory..., you will advise end-to-end implementationfrom design planning and layout to silicon validationensuring project achievementsLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 29 Jun 2026
Principal Analog Design Engineer
Company: Qorvo |
and performance specifications. Work closely with layout engineers to optimize floor planning, parasitic, and overall siliconLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 27 Jun 2026
Silicon Design Engineer
Company: Advanced Micro Devices |
development of multidimensional designs involving the layout of complex integrated circuits. Evaluate all aspects of the processLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 27 Jun 2026
Silicon Design Engineer
Company: Advanced Micro Devices |
of multidimensional designs involving the layout of complex integrated circuits. Evaluate all aspects of the process flow from high-levelLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 27 Jun 2026
Staff Analog Design Engineer
Company: Qorvo |
and performance specifications. Work closely with layout engineers to optimize floor planning, parasitic, and overall siliconLocation: San Jose, CA, USA
| Salary: US$144300 - 187600 per year | Date posted: 26 Jun 2026
Head Of Ic Design
Company: Power Integrations |
verification o CAD/Layout o Design reuse Ensure high-quality execution from specification through tape-out and siliconLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 26 Jun 2026
Data Center Engineer
Company: Etched |
selection and rack design, power distribution, networking layout, cabling, hardware management, day-to-day operations, and long... Own rack layout, capacity planning, power distribution, network design, cabling, and physical deployment of Etched HighLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 25 Jun 2026
Application Engineer
Company: Cadence Design Systems |
Design, Analog Layout, Advanced Verification or Hardware Emulation. This program is only for students graduatingLocation: San Jose, CA, USA
| Salary: US$74200 - 137800 per year | Date posted: 25 Jun 2026
Dmts Design Engineer
Company: Micron |
Background in memory controller architecture, firmware, or training algorithms Familiarity with DRAM physical layoutLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 24 Jun 2026
Hardware Compliance Regulatory Engineer
Company: Cisco Systems |
. Coordinate with JDM partner to address the design issues and come up with the EMC and RF test plan and provide PCB layout