VHDL jobs in oregon state USA
13 vhdl jobs found in oregon state: showing 1 - 13
Application Engineer – Associates Program (digital Verification Technology)
Company: Siemens |
architecture, design and implementation using UVM/OVM/AVM verification methodology, VHDL, Verilog and SystemVerilog simulations...Location: Wilsonville, OR, USA
| Salary: $108000 - 128000 per year | Date posted: 13 Apr 2024
Fpga Verification Engineer - Remote
Company: Randstad |
verification in Microsoft Word Implement simulation testbenches to verify requirements in QuestaSim using VHDL Support the... Education: Bachelors (required) skills: * Electrical Firmware FPGA Verification QuestaSim VHDL Xilinx Vivado DO-254...Location: Wilsonville, OR, USA
| Salary: $58 - 61 per hour | Date posted: 13 Apr 2024
Senior Electrical Engineer
Company: Belcan |
Microsoft Word Implement simulation testbenches to verify requirements in QuestaSim using VHDL Support the hardware...Location: Wilsonville, OR, USA
| Salary: $60.31 per hour | Date posted: 12 Apr 2024
Cpu Design Verification Lead
Company: Apple |
of hardware description languages (VHDL/Verilog), hardware verification languages (SystemVerilog, C/C++), and logic simulators...Location: Beaverton, OR, USA
| Salary: unspecified | Date posted: 07 Apr 2024
Applications Engineering Support Manager Functional Verification Eda
Company: Siemens |
particular Questa platform preferred. Hands-on experience in testbench and RTL languages (UVM, SV, Verilog, VHDL...Location: Wilsonville, OR, USA
| Salary: unspecified | Date posted: 06 Apr 2024
Software Engineer
Company: Siemens |
] Job Location: Wilsonville, OR Job Type: Full Time Duties: Design synthesizable VHDL and Verilog models for storage...Location: Wilsonville, OR, USA
| Salary: unspecified | Date posted: 22 Mar 2024
Emulation Engineer
Company: Apple |
, performance and throughput tuning. Experience with Verilog, VHDL design Experience with C/C++ and System Verilog, UVM...Location: Beaverton, OR, USA
| Salary: unspecified | Date posted: 22 Mar 2024
Senior Application Support Engineer (uvm, System Verilog, Vhdl)
Company: Siemens |
Minimum of 2+ years of Digital Design/Verification experience Knowledge of VHDL or Verilog, or SystemVerilog RTL languages...Location: Wilsonville, OR, USA
| Salary: $101200 - 182200 per year | Date posted: 13 Mar 2024
Embedded Software Engineer
Company: MKS Instruments |
. Experience with at least one scripting language (PowerShell, bash, etc.) Familiarity with Python Familiarity with Verilog/VHDL...Location: Beaverton, OR, USA
| Salary: unspecified | Date posted: 10 Mar 2024
Test Technician
Company: Vanguard EMS |
equipment platforms Knowledge of computer language such as C++, VHDL, VB.net and LabVIEW Efficiently read schematics...Location: Beaverton, OR, USA
| Salary: unspecified | Date posted: 08 Mar 2024
Hardware Electrical Engineer
Company: OptiTrack |
FPGA implementation and debugging, Verilog and VHDL, Xilinx, Lattice PCB prototype debugging, using standard test...Location: Corvallis, OR, USA
| Salary: unspecified | Date posted: 06 Mar 2024
Senior Electrical Engineer - Fpga Design (hybrid)
Company: Raytheon Technologies |
-transfer level with VHDL Perform RTL synthesis and implementation using FPGA tools such as Vivado Support board level...Location: Wilsonville, OR, USA
| Salary: $77000 - 163000 per year | Date posted: 03 Feb 2024
Emulation Engineer
Company: Apple |
Experience with Verilog, VHDL design Experience with Design Verification and System Verilog, UVM, and C/C++ verification...