ASIC Design Engineer - Pixel IP
Job position: ASIC Design Engineer - Pixel IP, Cupertino, CA, USA
of ASIC/FPGA design methodology, especially logic synthesis, static timing analysis, logic equivalence checking, and working... to and knowledge of ASIC/FPGA design methodology including familiarity with relevant scripting languages (Python, Perl, TCL). Good.....
Job Location: Cupertino, CA, USASalary: $121900 - 183600 per year
Company: Apple
Job posted: 10 Oct 2024
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