Principal FPGA Design Engineer
Job position: Principal FPGA Design Engineer, San Jose, CA, USA
is leading product in FPGA Emulation/Prototyping domain. This role is to design, verification, timing closure and hardware..., including design, verification, integration, timing closure, documentation and releasing the IPs to end users; Working on FPGA.....
Job Location: San Jose, CA, USASalary: $131600 - 244400 per year
Company: Cadence Design Systems
Job posted: 10 Jan 2025
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