Memory Controller Design Engineer
Job position: Memory Controller Design Engineer, Santa Clara, CA, USA
Memory Controller Design Team is looking for ASIC Design Engineers for the next generation high speed DDR Controllers. The... front end of the DDR controller interfaces to the rest of the system such as CPU, DSP, Multimedia Processors and the..
Job Location: Santa Clara, CA, USASalary: US$107400 - 161200 per year
Company: Qualcomm
Job posted: 01 Mar 2026
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