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R&D Intern - FPGA/RTL Design Engineer

Job position: R&D Intern - FPGA/RTL Design Engineer, Irvine, CA, USA

architecting for wireless communication projects. RTL coding, simulation, and test bench development. FPGA synthesis and timing..

Job Location: Irvine, CA, USA

Salary: US$28.6 - 33.8 per hour

Company: Motorola Solutions

Job posted: 21 Feb 2026

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R&D Intern - FPGA/RTL Design Engineer in Irvine, CA: Job XpdqUuVQ

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