Principal Engineer, High-Speed I/O (PHY) Architect - "SoC Architecture"
Job position: Principal Engineer, High-Speed I/O (PHY) Architect - "SoC Architecture", Folsom, CA, USA
interoperability of HSIO PHYs within the PCIe, SATA, Ethernet, USB2, USB3, USB4, Display or MIPI IO Controller subsystems Preferred.....
Job Location: Folsom, CA, USASalary: unspecified
Company: Intel
Job posted: 19 Feb 2025
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