Sr Logic Design RTL Engineer
Job position: Sr Logic Design RTL Engineer, Santa Clara, CA, USA
in Logic (RTL) Design Proficiency in Verilog/System Verilog/VHDL Strong fundamentals in VLSI design, digital design...+ years in Logic (RTL) Design Proficiency in Verilog/System Verilog/VHDL Strong fundamentals in VLSI design, digital.....
Job Location: Santa Clara, CA, USASalary: $78 per hour
Company: PDDN INC.
Job posted: 25 Jan 2025
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