Simulation jobs in san jose USA
211 simulation jobs found in san jose: showing 201 - 211
Senior Principal Software Engineer - Accelerated Verification Ip
Company: Cadence Design Systems |
than traditional simulation. Together, AVIP and VB are critical to customers building highperformance compute... definition Highperformance transactor and BFM development Hardwaresoftware cosimulation and emulation flows Debug, loggingLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 14 Mar 2026
Optical Engineering Intern
Company: Advantest |
simulation tools like Zemax, Lumerical, or RSoft. Familiarity with different connector types (MPO, SN-MT, LC/PC) and fiberLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 14 Mar 2026
Principal Design Engineer
Company: Micron |
including full chip circuit simulation and Verilog regression Design and optimize the wide internal parallel data bus spanningLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 14 Mar 2026
Software Engineer – High-fidelity Multiphase Cfd (new College Grad With Phd)
Company: Cadence Design Systems |
, high-fidelity simulation of multiphase turbulent flows. This position involves developing parallel simulation codes.... Key Responsibilities Design and implement simulation software for multiphase flows using concepts from Volume-of-FluidLocation: San Jose, CA, USA
| Salary: US$114800 - 213200 per year | Date posted: 13 Mar 2026
Senior Design Verification Engineer
Company: Altera |
& validation team is to verify and validate the IP for robust functionality from functional simulation. The verificationLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 12 Mar 2026
Principal Engineer, Nand Pathfinding
Company: Micron |
across silicon, design, architecture, and systems Lead experimental work, including characterization, simulation, and validationLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 12 Mar 2026
Asic Engineering Technical Leader- Dft
Company: Cisco Systems |
level simulation, debugging with VCS and other simulators. Post-silicon validation and debug experience; Ability to workLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 11 Mar 2026
Project Design Lead (ex)
Company: Nexperia |
Crossing (RDC) analysis to confirm correct handling of resets across domains. Analyze simulation, synthesis, and timing reports... modeling techniques (e.g., SystemVerilog, Verilog-A) to enable mixed-signal simulation and validate digital-analog interactionLocation: San Jose, CA, USA
| Salary: US$188760 per year | Date posted: 11 Mar 2026
Lead Product Engineer (emir / Pdn Analysis & Power Integrity)
Company: Cadence Design Systems |
and Behavioral simulation fundamentals related to IC and Package Design. Debugging of Low power and multiple power domain analysisLocation: San Jose, CA, USA
| Salary: US$114800 - 213200 per year | Date posted: 10 Mar 2026
Silicon Design Verification Engineer
Company: Advanced Micro Devices |
firmware and RTL using simulation tools Experience developing and working with UVM-based verification environments... environment. Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process Good understandingLocation: San Jose, CA, USA
| Salary: unspecified | Date posted: 10 Mar 2026
Principal Product Engineer (analog Design Automation)
Company: Cadence Design Systems |
, simulation, and ADE environments. Exposure to design automation, circuit optimization, or migration flows. Understanding