Wireless SoC Design Engineer
Apple
- Sunnyvale, CA
- Permanent
- Full-time
- Proficient in digital design fundamentals, with a strong foundation.
- Skilled in defining ASIC microarchitecture to meet functional requirements while managing performance, power, and area trade-offs.
- Knowledgeable about the ASIC design flow, including System Verilog RTL implementation, Lint, Synthesis, STA, and LEC.
- Expertise in various areas such as memory subsystems, bus interfaces, CPU integration, DMA engines, Compression, Security IP design, and high-speed/low-speed peripherals like PCIE, QSPI, UART, and SPMI is a plus.
- Thorough understanding of cross clock-domain design principles and associated CDC requirements.
- Familiarity with ASIC low power design techniques, including multiple supply domains configuration, dynamic power/clock scaling, and power analysis, is a plus
- Familiarity with ASIC test methodologies, encompassing DFT, scan insertion, memory BIST, and other related techniques.
- Excellent organizational skills.
- Strong communication skills, both written and oral.
- BS and 10+ years of relevant industry experience. MS Preferred