GPU Design Verification Lead
Qualcomm
- Austin, TX
- Permanent
- Full-time
GPU ASICS EngineeringGeneral Summary:GENERAL SUMMARY:Architects, designs, implements, verifies, and optimizes performance and power of GPU cores. Responsible for verification of Graphics IP , and performing pre- and post-silicon verification to verify correctness and ensure performance and power goals are met.The responsibilities of this role include:
- Owning and executing on key independent tasks towards program requirements
- Using verbal and written communication skills to convey basic, routine factual information about day-to-day activities to others who are fully knowledgeable in the subject area.
- Working within prescribed timeline requirements and resource constraints
- Applying independent creative thought to troubleshoot technical problems or deal with novel circumstances.
- Research through available resources and engagement with various inter-disciplinary teams
- Using deductive problem solving to solve moderately complex problems; most problems have defined processes of diagnosis/detection; some limited data analysis may be required.
OR
Master's degree in Computer Engineering, Computer Science, Electrical Engineering, or related field and 5+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.
OR
PhD in Computer Engineering, Computer Science, Electrical Engineering, or related field and 4+ years of Software Engineering, Hardware Engineering, Systems Engineering, or related work experience.PREFERRED QUALIFICATIONS:
- 5+ years relevant GPU experience (either external or internal).
- 10+ year of academic and/or work experience in verification role
- 12+ years Hardware Engineering, Software Engineering, Systems Engineering, or related work experience
- 10+ years Hardware Engineering, Software Engineering, Systems Engineering, or related work experience
- Good communication and interpersonal skills
- Owned/Led block level verification activities for CPU/GPU project
- Verification skills: Test planning, Scripting, Simulation, problem solving and debug.
- System Verilog, UVM, Verilog or VHDL, C/C++ skills required.
- Constrained random, Functional Coverage development, design debug experience required.
- Deep exposure to CPU or GPU development (at least 5 years)
- Experience with solid technical leadership skills to provide impactful guidance to a team
- Experience in GPU block/module based verification
- Testbench Architecture and Implementation
- Strong SV/UVM knowledge
- GPU Shader Subsystem exposure
- Various types of reference model development and deployment
- Scripting and automation skills (Python, Make, Airflow etc)
- Formal verification - FPV and DPV experience is a plus
- Applies Graphics knowledge and experience to architect, design, implement, and verify the structure and performance of GPU hardware, drivers, features, applications, and tools.
- Creates and maintains verification testbenches and environments in Systemverilog/UVM
- Guide more junior engineers in testbench development, SV/UVM coding, and overall verification process
- Create and leverage advanced testing frameworks to generate and recreate real-world system integration conditions
- Collaborates with Architecture, Software , Firmware, Design , Modeling, Emulation and Post-silicon validation teams to define and develop test methodology and content
- Participate in GPU architecture, micro-architecture reviews
- Collect, organize and execute various forms of system level test content including directed testcases, gaming benchmarks, standards compliance testsuites, and system level scenarios
- Build automation for continue integration and testing based on latest GPU IP
- Help collect and analyze test results using straightforward statistics and data predictions to track benchmarks and identify issues
- Works with team members to understand and align on narrow scope of feature development and meet targets.
- Write technical documentation and feature descriptions for straightforward projects under the direction of a supervisor.